FPGA Pong Implementation
FPGA Pong Implementation
High Level Design of FPGA and IO
Collision detecting HDL schematic
Potentiometer Speed Control and indicator
Final Synthesized design in RTL Viewer
The result of this project was invaluable experience in digital logic design of low-abstraction systems like FPGAs. This project was my most ambitious up to that point and the results were beyond what we could have believed we were capable of.